The FPGA Developers’ Forum (FDF) is a platform to discuss and exchange information, experiences, implementation ideas, tips, and tricks as well as challenges faced with design tools, specific FPGA technologies.
The 1st FDF meeting will take place at CERN on 11-13 June 2024.
We will discuss several FPGA related topics, look at the scientific programme on the sidebar for details.
We are open to new ideas and the list will be adapted depending on your contributions. Have you got something to share with the community?
Submit an abstract now for your presentation through the button below.
There is no registration fee, you’re very welcome to participate in the FDF meeting even if you’re not giving a talk. And remember that FDF is open to anyone, not only CERN users.
The FDF aims to form a topical community of digital designers — especially on FPGAs — working in physics and beyond, and to discuss details that very rarely see the light of day in typical workshops in our field.
We will focus on the ‘how’ digital designs are implemented rather than their scientific end-goal, and novelty is not the only criterion. Sharing tips on how to avoid pitfalls, or other ideas and recommendations that could save your colleagues precious time, are considered equally important.
A CERN account is needed for the submission and registration. If you do not have one, it can be created here.
See you at CERN!
