Conference Dates: September 24-27, 2019
Location: Globe of Science and Innovation at CERN (Geneva, Switzerland)
Event Description:
This IXPUG conference is focused on all aspects of adopting and employing state-of-the-art data-processing technologies and techniques for optimal application execution. This includes accelerators (e.g. FPGAs, GPUs), as well as topics related to system hardware beyond the processor (memory, interconnect, etc.), software tools, programming models, new workloads, and more — all with a focus on Intel platforms. The conference will provide an interactive experience, organised around key themes associated with high-performance computing, data analytics, artificial intelligence (machine and deep learning), cloud computing, and more. The meeting will be held at CERN, the European Laboratory for Particle Physics, in Geneva, Switzerland. The conference will feature keynote presentations, invited talks, 30-minute technical sessions, 10-to-15-minute lightning talks, and two-hour hands-on tutorials. Attendees will encounter an open forum, through which experts from academia and industry including Intel representatives will share best practices and techniques for maximizing software efficiency. We will share experience in using Intel architectures and technologies with fellow application programmers, software developers, scientists, researchers, academics, students, systems analysts, etc. The challenges surrounding application performance and scalability will be covered across all levels, including application tuning on large HPC systems.
Event Agenda:
Presentations and recording archive links are posted below.
Day 1: Tuesday, September 24, 2019
| Start | End | Title | Author(s) | Presentation | Recording |
| 08:30 | 09:00 | Registration and Coffee | |||
| 09:00 | 09:15 | Welcome by Host | Alberto Di Meglio (CERN), Eckhard Elsen (CERN), Thomas Steinke (IXPUG President; Zuse Institute Berlin) | Recording | |
| 09:15 | 10:00 | Deep Learning Workflows: Examples from High Energy Physics | Sofia Vallecorsa (CERN) | Recording | |
| 10:00 | 10:30 | Deploying AI Frameworks on Secure HPC Systems with Containers | Sofia Vallecorsa (CERN) | Recording | |
| 10:30 | 11:00 | Distributed Training of Generative Adversarial Networks for Fast Simulation |
Sofia Vallecorsa (CERN) |
Presentation | Recording |
| 11:00 | 11:15 |
Coffee Break |
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| 11:15 | 11:30 | Performance and Scalability Analysis of CNN-based Deep Learning Inference in the Intel Distribution of OpenVINO Toolkit | Iosif Meyerov, Valentina Kustikova, Evgenii Vasiliev, Evgeniy Kozinov, and Valentin Volokitin (Lobachevsky State University of Nizhni Novgorod), Zakhar Matveev and Kirill Korniakov (Intel Corporation) | Presentation | Recording |
| 11:30 | 12:15 |
Progress and Challenges on HPC and AI Convergence |
Victor Lee (Intel Corporation) | Presentation | Recording |
| 12:15 | 13:15 | Lunch Break | |||
| 13:15 | 13:45 | “Big Data In HEP” - Physics Data Analysis, Machine learning and Data Reduction at Scale with Apache Spark | Luca Canali (CERN), Vaggelis Motesnitsalis (CERN), Oliver Gutsche (Fermilab) | Presentation | Recording |
| 13:45 | 14:15 | I/O for Deep Learning at Scale | Quincey Koziol (National Energy Research Scientific Computing Center, Lawrence Berkeley National Lab) | Presentation | Recording |
| 14:15 | 14:30 | Deep Learning for Satellite Imagery | Yoann Boget (University of Geneva), Sofia Vallecorsa (CERN) | Presentation | Recording |
| 14:30 | 15:00 | Exploiting Emerging Multi-core Processors for HPC and Deep Learning using MVAPICH2 MPI Library | Dhabaleswar Panda (The Ohio State University), Hari Subramoni (The Ohio State University) | Presentation | Recording |
| 15:00 | 15:30 |
OpenCL in Scientific High Performance Computing |
Matthias Noack (Zuse Institute Berlin) | Presentation | N/A |
| 15:30 | 15:45 | Coffee Break | |||
| 15:45 | 16:15 |
OpenMP to FPGA Offloading Prototype Using the Intel FPGA SDK for OpenCL – an IXPUG Success Story |
Marius Knaust (Zuse Institute Berlin) | Presentation | N/A |
| 16:15 | 17:00 | Next Generation Intel MPI Product for Next Generation Systems: Latest Intel MPI Features and Optimization Techniques | Klaus-Dieter Oertel (Intel Corporation) | Presentation | Recording |
| 17:00 | 17:15 |
IXPUG Day 1 Closing Remarks (Day 1 Recap & Day 2 Agenda) |
|
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| 17:15 | 19:00 | Networking Reception |
Day 2: Wednesday, September 25, 2019
| Start | End | Title | Author(s) | Presentation | Recording |
| 08:30 | 09:00 |
Registration and Coffee |
|||
| 09:00 | 09:15 |
Day 2 Agenda Review |
|||
| 09:15 | 09:45 |
Cost-Efficiency of Large-Scale Electronic Structure Simulations with Intel Xeon Phi Processors |
Hoon Ryu (Korea Institute of Science and Technology Information) | Presentation | Recording |
| 09:45 | 10:15 | Optimizing Beyond Vectorization and Parallelization: a Case Study on QMCPACK | William Jalby (UVSQ / ECR), Cédric Valensi (UVSQ / ECR) | Presentation | N/A |
| 10:15 | 10:30 | Hybrid-BLonD: Efficient Scale-out of Beam Longitudinal Dynamics Simulations | Konstantinos Iliakis (CERN & NTUA/MicroLab) | Presentation | Recording |
| 10:30 | 10:45 | Optimizing Astrophysical Simulation and Data Analysis Codes on Intel Architectures |
Salvatore Cielo (Leibniz Supercomputing Centre), Luigi Iapichino (Leibniz Supercomputing Centre), Fabio Baruffa (Intel Corporation) |
Presentation | Recording |
| 10:45 | 11:00 | Coffee Break | |||
| 11:00 | 11:15 |
High-Fidelity Rendering for Large-Scale Tiled Displays |
Joao Barbosa (The University of Texas at Austin - TACC), Paul Navratil (The University of Texas at Austin- TACC) | Presentation | Recording |
| 11:15 | 11:30 |
Applying Vectorization to Lattice QCD Calculations |
Shun Xu (Computer Network Information Center, Chinese Academy of Sciences), Zhong Jin (Computer Network Information Center, Chinese Academy of Sciences) |
Presentation | Recording |
| 11:30 | 12:15 |
A Journey over the Memory Management Stack for HPC Large Applications on Modern Architectures |
Sébastien Valat (ATOS/Bull) | Presentation | Recording |
| 12:15 | 13:15 | Lunch Break | |||
| 13:15 | 14:15 | Site Updates |
Joao Barbosa (Texas Advanced Computing Center)
|
N/A | |
| 14:15 | 14:45 |
Disrupting High Performance Storage with Intel® Optane™ DC Persistent Memory & DAOS |
John Carrier (Intel Corporation) | Presentation | Recording |
| 14:45 | 15:15 |
Modernizing Legacy Codes for Next-Generation Storage Infrastructures: A Case Study of PALM on Intel DAOS |
Steffen Christgau (Zuse Institute Berlin) |
Presentation | Recording |
| 15:15 | 15:30 |
Toward Easing the Use of Optane DIMMs as Part of Heterogeneous Memory Systems |
Marc Jordà (Barcelona Supercomputing Center), Harald Servat (Intel Corporation), Antonio J. Peña (Barcelona Supercomputing Center) |
Presentation | Recording |
| 15:30 | 15:45 |
Coffee Break |
|||
| 15:45 | 16:15 |
Persistent Memory Based Key-Value Store for Data Acquisition Systems |
Maciej Maciejewski (Intel Corporation), Grzegorz Jereczek (Intel Corporation), Danilo Cicalese (CERN), Giovanna Lehmann Miotto (CERN) |
Presentation | Recording |
| 16:15 | 16:45 |
Partitioned Interleaved Bloom Filters Using Optane DC Persistent Memory |
Knut Reinert (Freie Universität Berlin), Enrico Seiler (Freie Universität Berlin) | Presentation | Recording |
| 16:45 | 17:30 |
Exploiting Persistent Memory for Workflows and Computational Simulation |
Adrian Jackson (The University of Edinburgh) | Presentation | Recording |
| 17:30 | 17:45 | IXPUG Day 2 Closing Remarks (Day 2 Recap and Day 3 Agenda) |
Day 3: Thursday, September 26, 2019
| Start | End | Title | Author(s) | Presentation | Recording |
| 08:30 | 09:00 | Registration and Coffee | |||
| 09:00 | 09:15 | Day 3 Agenda Review | |||
| 09:15 | 09:45 |
An Integrated FPGA Orchestrator for Seamless Scalability and Resource Management |
Elias Koromilas (InAccel) | Presentation | Recording |
| 09:45 | 10:15 |
Characterizing Performance Benefits of HBM2 on Intel® Stratix® 10 FPGAs |
Richard Chamberlain (BittWare), Tiziano De Matteis (ETH Zurich) | Presentation | Recording |
| 10:15 | 10:45 |
Acceleration of Scientific Deep Learning Models on Heterogeneous Computing Platform with Intel® FPGA |
Chao Jiang (University of Florida), Sofia Vallecorsa (CERN) |
Presentation | Recording |
| 10:45 | 11:00 |
Coffee Break |
|||
| 11:00 | 11:30 |
Natural Language Processing with Intel® Quantum Simulator |
Myles Doyle (Irish Centre for High-End Computing (ICHEC)) |
Presentation | Recording |
| 11:30 | 11:45 |
Simple Implementation of Quantum Bits in Silicon by Decoupling Them in Space and Time |
Nagi Mekhiel (Ryerson University) |
Presentation | Recording |
| 11:45 | 12:30 |
Extraordinary Use Cases for Exascale Class Technology: How AI and DA Combined with HPC Shape Innovation in Exascale Architectures |
Marie-Christine Sawley (Intel Corporation) |
Presentation | Recording |
| 12:30 | 13:15 |
General Purpose Heterogenous Next-Generation Systems |
Richard Gerber (National Energy Research Scientific Computing Center, Lawrence Berkeley National Lab), Nicholas Wright (National Energy Research Scientific Computing Center, Lawrence Berkeley National Lab) | Presentation | Recording |
| 13:15 | 13:30 | IXPUG Day 3 Closing Remarks (Day 3 Recap and Conference Closing Remarks) | |||
| 13:30 | 14:00 |
Lunch Break Attendees must exit the Globe building by 14h (i.e., walk to Tutorial 1 & Tutorial 2 session venues). |
|||
| 14:45 | 16:45 |
Tutorial 1: Numba/HPAT and Daal4py: The Painless Route in Python to Fast and Scalable Data-Analytics/Machine-Learning |
Frank Schlimbach (Intel Corporation) |
Presentation | N/A |
| 14:45 | 16:45 | Tutorial 2: Verificarlo: Floating-Point Computing Verification and Optimization | Eric Petit (Intel Corporation), Yohan Chatelain (Universty of Versailles, Li-Parad, ECR Lab), Pablo de Oliveira Castro (Universty of Versailles, Li-Parad, ECR Lab), David Defour (Universty of Versailles, ECR Lab, and University of Perpignan) | Presentation | N/A |
| 17:00 | 18:00 | Visit to CERN Supercyclotron | Limited attendance; details to sign up provided separately to conference registrants |
Day 4: Friday, September 27, 2019
| Start | End | Title | Author(s) | Presentation | Recording |
| 09:00 | 12:00 |
Tutorial 3: Compute Offload Acceleration with FPGA Location: 513/1-024 (CERN) |
Francisco Perez (Intel Corporation) | Presentation | N/A |
| 12:00 | 13:30 |
Lunch Break |
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| 13:30 | 16:00 |
Tutorial 4: Intel Solution for AI Location: 513/1-024 (CERN) |
Walter Riviera (Intel Corporation) | N/A | N/A |
Travel Information:
- CERN Tours: Explore CERN with guided tours for individuals and permanent exhibitions.
- Visa Requirements: Please contact This email address is being protected from spambots. You need JavaScript enabled to view it. at CERN openlab for visa questions.
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Transportation and Parking: Please review the "Visit CERN" website for transportation and parking details (including nearby airports, public transportation, CERN site map, etc.). Also, review the "Code of Conduct for Visitors to CERN" and "Frequently Asked Questions" for more details.
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Lodging: Nearby hotel suggestions are listed below
Hotels in Geneva, within walking distance to Tram 18 to CERN:
NH Hotel Geneva Airport
Holiday Inn Express Geneva Airport
Ibis Budget Hotel Geneva Airport
Ibis Styles Geneve Mont Blanc
Hotels on the French side (these hotels have shuttles from the airport, and in the morning they can take guests and drop them off at CERN):
Business Park Hotel Thoiry
Hotel Ibis St Genis Pouilly
Call for Abstracts
IXPUG is soliciting submissions for technical presentations on innovative work from users in academia, industry, government/national labs, OEMs, ISVs, etc. describing original discoveries, experiences and methods for obtaining efficient and scalable use of heterogeneous systems using Intel architectures and technology platforms. IXPUG welcomes technical abstracts that cover 30-minute technical sessions, 10-to-15 minute lightning talks, and two-hour hands-on tutorials. Please notice, tutorials should be interactive focusing on key topics of high-performance computing, data analytics, artificial intelligence (machine and deep learning, visualization, cloud or performance evaluation, etc.).
Abstract Submission Guidelines:
A short abstract should be submitted by July 19, 2019 (updated!) via EasyChair and the content should reflect the topics of interest that are listed below. All final presentations are due by September 23, 2019. We would like you to include keywords that pertain to the techniques, Intel products and associated domains that pertain to your technical work. Please see the full list below:
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Techniques: Artificial Intelligence (Machine Learning/Deep Learning), Algorithms & Methods, Compiler Flags, Software Environment & Tools, Libraries & Tools, Parallel- Programming (Communications, Thread & Process Management Experience, All), Multi-node, Memory, Vectorization, etc.
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Products: Intel® Xeon Scalable processor, Intel® Omni Path Fabric, Intel® FPGA, Intel® SSDs/NVMe Solutions, Intel® Lustre Software and DAOS, Visualization Technology, Intel® SW Tools
- Domains: Astrophysics, Bioinformatics, Chemistry, Climate & Weather, Computational Fluid Dynamics, Data Analytics, Energy/Oil & Gas, Financial Services, Geophysics, Life Sciences, Material Science, Medical imaging, Molecular Dynamics, Nanotechnology, Physics, Visualization, High Energy Physics, etc.
Abstract Topics of Interest:
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Implication of workload behavior on system design at extreme scale (Power, Reliability, Scalability, Performance, Processor Design, Memory System, I/O)
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Software environments and tools for computing at extreme scale (Instrumentation, Debugging/Correctness, Thread and Process Management, Libraries and Language Development)
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Experience using extreme scale systems: Usability, In-situ Visualization, Programming Challenges, Algorithms and Methods, etc.
- Application characterization on emerging technologies: Novel Memories (NVM), processors (Intel® Xeon Scalable processor, Intel® FPGA, etc.)
Organizers
- Thomas Steinke, IXPUG President (Zuse Institute Berlin)
- Estela Suarez (Juelich Supercomputing Centre)
- R. Glenn Brook, IXPUG Vice-President (University of Tennessee, Knoxville)
- Alberto Di Meglio (CERN openlab)
- Maria Girone (CERN openlab)
- Federico Carminati (CERN openlab)
- Sofia Vallecorsa (CERN openlab)
- Andrew Robert Purcell (CERN openlab)
- Kristina Gunne (CERN openlab)
- David Martin (Argonne National Laboratory)
- Richard Gerber (NERSC/LBNL)
- Nalini Kumar (Intel Corporation)
- Shari Lawrence (Intel Corporation)
Abstract Review Committee
- Thomas Steinke, IXPUG President (Zuse Institute Berlin)
- Estela Suarez (Juelich Supercomputing Centre)
- R. Glenn Brook, IXPUG Vice-President (University of Tennessee, Knoxville)
- Alberto Di Meglio (CERN openlab)
- Maria Girone (CERN openlab)
- Federico Carminati (CERN openlab)
- Sofia Vallecorsa (CERN openlab)
- Nalini Kumar (Intel Corporation)
- David Martin (Argonne National Laboratory)
- Richard Gerber (NERSC/LBNL)
- Hai Ah Nam (LANL)
- Clay Hughes (SNL)
- Fabio Affinito (CINECA)
- John Pennycook (Intel Corporation)
- David Keyes (KAUST)
- Taisuke Boku (University of Tsukuba)
- James Lin (Shanghai Jiao Tong University)
- Sergi Siso (UK Science & Technology Facilities Council)
Sponsors:
- CERN openlab
- Intel Corporation
Questions? Email This email address is being protected from spambots. You need JavaScript enabled to view it.