Marcos Vinicius Silva Oliveira

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SNpy : Sorting Networks Python HDL Utilities
A Python package for generating, plotting, optimizing, and generating HDL description of sorting networks.

PCBpy : Printed Circuit Board Tool for Cadence Allegro
Python tool to extract inter-connectivity from the back-annotated board design net-list in order to generate VHDL wrappers, placing & polarity constraints and net-list verification reports

IBERTpy : Integrated Bit Error Ratio Tester Tool for Xilinx Vivado
A Python package for running IBERT Eye scan in Vivado, plotting eye diagrams with mathplotlib and compiling results with LaTeX

MUCTPI high-speed serial link testing
Keywords: ATLAS MUCTPI, FPGA, Data Eye Diagram Methodology, IBERT, High-speed Serial Links, Latency Measurements, TTC System, Clock & Data Recovery using FPGA transceivers.

High-Performance Correlation Coefficient Calculator
Keywords: SoC, FPGA, Hardware Aceleration, Avalon bus, DMA burst transfers, Evaluation Kit Prototyping, Altera Cyclone V System-on-Chip FPGA.

The ATLAS MUCTPI Upgrade for the Run 3 of the LHC
Keywords: ATLAS MUCTPI, FPGA, High-speed Serial Links, Automated testing, Evaluation Kit Prototyping, PCB Design & Verification, SoC, Xilinx UltraScale FPGAs.

FPGA LCD Controller
Keywords: LCD, SoC, FPGA, Hardware Aceleration, Avalon bus, DMA burst transfers, Evaluation Kit Prototyping, Altera Cyclone V System-on-Chip FPGA.

ATLAS Level-1 Muon Topological Trigger Information for Run 2 of the LHC
Keywords: ATLAS MUCTPI, FPGA, Metastability Analysis, FPGA Primitives, Automated Testing, Evaluation Kit Prototyping, PCB Design, Xilinx 7-series FPGAs.

Finite Word‐Length Effects in Neural Networks
Keywords: Finite Word‐Length Effects, Machine Learning, Neural Network Classification, FPGA, Altera Stratix and Cyclone Series.