Details

Date	19/11/2020
Location	University of Bristol lab
People	David Cussans, Stoyan Trilov

Test objective

Verify the operation of the timing firmware at 62.5 MHz, https://gitlab.cern.ch/protoDUNE-SP-DAQ/timing-board-firmware/-/tags/relval%2Fv5.3.0%2Fb1. This test is broken down into several stages, where each stage tests different hardware configurations. The test setup and results for each stage are outlined below.

PC053A<->PC053D - 19/11/2020

This stage of the test used an pc053a fmc as the timing master with "yellow" 1000base-bx SFP (1490nm-TX/1310nm-RX), and an pc053d as a timing endpoint with blue SFP (1310nm-TX/1490nm-RX). The two FMCs were connected directly via a single mode fibre.

Hardware and firmware

pc053a UID: 0xd880395e1a6a, bitfile: http://pdts-fw.web.cern.ch/pdts-fw/tags/relval/v5.3.0/b1/latest/ouroboros_pc053a_fmc_relval-v5-3-0-b1_sha-6166f462_runner-slu9p8x4-project-19909-concurrent-0_201119_1304.tgz

pc053d UID: 0x49162b675e3, bitfile: http://pdts-fw.web.cern.ch/pdts-fw/tags/relval/v5.3.0/b1/latest/endpoint_pc053d_fmc_relval-v5-3-0-b1_sha-6166f462_runner-slu9p8x4-project-19909-concurrent-8_201119_1301.tgz

Software

The software version used for this test was: https://gitlab.cern.ch/protoDUNE-SP-DAQ/timing-board-software/-/tags/v5.2.1. For the commands targeting the pc053d board, the file timing-board-software/python/pkg/pdt/cli/io.py, was modified to include the UID of the pc053d board (see below).

@@ -63,6 +63,7 @@ kUIDRevisionMap = {
     0x049162b67cdf: kFMCRev3,
     0x49162b62050 : kFMCRev3,
     0x49162b62951 : kFMCRev3,
+    0x49162b675e3 : kFMCRev3,
     0xd88039d980cf: kPC059Rev1,

Device configuration

The ouroboros design was configured using the following commands:

pdtbutler io PRIMARY reset -- force-pll-cfg Si5344-053master_312.5_mhz-Registers.txt
pdtbutler mst PRIMARY part 0 configure

The endpoint was configured using the commands below:

pdtbutler io EPT_0 reset --force-pll-cfg Si5394-053endptr_62-5MHz_4kHz-Registers.txt
pdtbutler ept EPT_0 0 enable

Clock files used in this test are attached.

Test results

Following the configuration of the master and endpoint devices, the endpoint moved into state 0x6 (Waiting for phase adjustment command), indicating that it was successfully receiving and decoding the timing datastream. Following the execution of the following command on the ouroboros design, the endpoint moved into state 0x8 (Ready).

pdtbutler mst PRIMARY align apply-delay 0 0 0 --force

After ~1200 received timestamp messages, the endpoint was configured with following sequence of coarse and fine delay values, remaining locked after each delay configuration was applied.

cdel	fdel
0x1	0x0
0x1	0x4
0x0	0x0

The endpoint stayed locked for ~7000 timestamp messages before the test was terminated.

Created endpoint device EPT_0
+---------+
|    0    |
| 0x50100 |
+---------+
+------------------+---------------------------------+
|     Endpoint     |                0                |
+------------------+---------------------------------+
| State            | Ready (0x8)                     |
| Partition        | 0                               |
| Address          | 0                               |
| Timestamp        | Thu, 01 Jan 1970 03:16:24 +0000 |
| Timestamp (hex)  | 0x5f48ef9340                    |
| EventCounter     | 0                               |
| Buffer status    | OK                              |
| Buffer occupancy | 0                               |
+------------------+---------------------------------+

--- Endpoint state ---
+------------+----------+
|  Endpoint  |    0     |
+------------+----------+
| buf_err    |   0x0    |
| buf_warn   |   0x0    |
| cdelay     |   0x0    |
| ep_rdy     |   0x1    |
| ep_rsto    |   0x0    |
| ep_stat    |   0x8    |
| fdelay     |   0x0    |
| in_run     |   0x0    |
| in_spill   |   0x0    |
| sfp_tx_dis |   0x0    |
+------------+----------+

--- Command counters ---
+--------------+----------+
|   Endpoint   |    0     |
+--------------+----------+
| TimeSync     |   6931   |
| Echo         |          |
| SpillStart   |          |
| SpillStop    |          |
| RunStart     |          |
| RunStop      |          |
| WibCalib     |          |
| SSPCalib     |          |
| FakeTrig0    |          |
| FakeTrig1    |          |
| FakeTrig2    |          |
| FakeTrig3    |          |
| BeamTrig     |          |
| NoBeamTrig   |          |
| ExtFakeTrig  |          |
| None         |          |
+--------------+----------+

PC053D<->PC053D - 23/11/2020

This stage of the test used an pc053d fmc as the timing master with "yellow" 1000base-bx SFP (1490nm-TX/1310nm-RX), and an pc053d as a timing endpoint with blue SFP (1310nm-TX/1490nm-RX). The two FMCs were connected directly via a single mode fibre.

Hardware and firmware

pc053d UID: 0x49162b62951, bitfile: http://pdts-fw.web.cern.ch/pdts-fw/tags/relval/v5.3.0/b1/latest/ouroboros_pc053d_fmc_relval-v5-3-0-b1_sha-6166f462_runner-slu9p8x4-project-19909-concurrent-1_201119_1304.tgz

pc053d UID: 0x49162b675e3, bitfile: http://pdts-fw.web.cern.ch/pdts-fw/tags/relval/v5.3.0/b1/latest/endpoint_pc053d_fmc_relval-v5-3-0-b1_sha-6166f462_runner-slu9p8x4-project-19909-concurrent-8_201119_1301.tgz

Software

The software version used for this test was: https://gitlab.cern.ch/protoDUNE-SP-DAQ/timing-board-software, commit: 9d6dca2e30fc0152bdd4780a3cdedf2156cb72f7.

Device configuration

The ouroboros design was configured using the following commands:

pdtbutler io PRIMARY reset -- force-pll-cfg Si5394-053master_62-5MHz.txt
pdtbutler mst PRIMARY part 0 configure

The endpoint was configured using the commands below:

pdtbutler io EPT_0 reset --force-pll-cfg Si5394-053endptr_62-5MHz_4kHz-Registers.txt
pdtbutler ept EPT_0 0 enable -a 2

Clock files used in this test are attached.

Test results

Following the configuration of the master and endpoint devices, the endpoint moved into state 0x6 (Waiting for phase adjustment command), indicating that it was successfully receiving and decoding the timing datastream. Following the execution of the following command on the ouroboros design, the endpoint moved into state 0x8 (Ready).

pdtbutler mst PRIMARY align apply-delay 0 0 0 --force

The endpoint remained in state 0x8 for an excess of 285748 timestamp messages before the test was terminated.

-- StoyanMiroslavovTrilov - 2020-11-19